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CPU upgrade x10


zzattack
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29 minutes ago, lOgIcAl said:

zzattack that is extraordinary work and is very much appreciated by everyone here no doubt. A lot of effort has gone into that and it should be applauded.

Can I ask, does the via in pad possibly cause any BGA rework issues with the small holes on the BGA points upon melting the solder balls, making it a weaker joint? As in some of the ball going down the via on the pad compared to the other normal pads, meaning a miss match in solder ball height under the interposer board?

Would the hole cause air bubbles to form in the ball as it reaches melting fluidity with the flux too? Pop, then splatter, causing a bridge etc?
 

From what I understand, the vias encourage bridging among other issues.. I think he covered the vias with solder mask and it helped him a lot. Reduced a lot of failures. :)

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Normally yes. This is why in the rev2 design no via in pad is used and I've made a considerate effort to keep vias away from silk screen. However, I then found out that jlcpcb charges no extra for POFV: : https://jlcpcb.com/blog/32-Free-Via-in-Pad-on-6-20-Layer-PCBs-with-POFV

In this case, this is very attractive so I made rev3 specifically to take advantage of this. 

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21 hours ago, Bowlsnapper said:

From what I understand, the vias encourage bridging among other issues.. I think he covered the vias with solder mask and it helped him a lot. Reduced a lot of failures. :)

@zzattack

25 minutes ago, zzattack said:

Normally yes. This is why in the rev2 design no via in pad is used and I've made a considerate effort to keep vias away from silk screen. However, I then found out that jlcpcb charges no extra for POFV: : https://jlcpcb.com/blog/32-Free-Via-in-Pad-on-6-20-Layer-PCBs-with-POFV

In this case, this is very attractive so I made rev3 specifically to take advantage of this. 

The vias in between the pads? Weren't you experiencing bridging confirmed with xrays so you covered the vias and had better success? I hope I'm not mixing you up with somebody else...

I'm confused because you posted a confused face on my post. Lol

 

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17 hours ago, zzattack said:

Normally yes. This is why in the rev2 design no via in pad is used and I've made a considerate effort to keep vias away from silk screen. However, I then found out that jlcpcb charges no extra for POFV: : https://jlcpcb.com/blog/32-Free-Via-in-Pad-on-6-20-Layer-PCBs-with-POFV

In this case, this is very attractive so I made rev3 specifically to take advantage of this. 

Ah okay so normally it would cause issues but thanks to that POFV process you get flat pads. Thanks for the link, very interesting.

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