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Lpc Abort Cycle


furon
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As we know, v1.2-1.4 Xboxes don't have an easily-accessible LFRAME# signal, so modchips work on the assumption that the southbridge will never abort a cycle early by asserting LFRAME# and driving 0b1111 onto LAD[3:0]. That may be true for memory read cycles, but what about memory writes and I/O read/write cycles? Besides a timeout (which shouldn't happen anyway if long wait states are used), is there ever a case where the MCPX might abort an LPC cycle?

EDIT: I may have posted this in the wrong section. I need this info for a hardware mod, but it might be better suited in the Modchip or General forum. Sorry about that.

Edited by furon
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Looking at the LPC spec again, I realized it doesn't matter anyway, because LFRAME# is absolutely required in order to recognize I/O read cycles, which put 0b000 on LAD during the CYCTYPE+DIR phase. A modchip would skip both START and CYCTYPE+DIR, then recognize the first non-zero I/O port adress nibble as the start of a transaction.

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