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Mu.

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Posts posted by Mu.

  1. It should also be noted that there is a space for a solder jumper in the space of R3 (just under the pin socket), which either connects the LPC headers RST pin to ground on the CPLD or to the Reset pin on the 49LF0X0 chip. I'm not well versed enough in this to know why this would be something you'd want, but having the option on this board seems very unusual.

  2. I purchased an XT+2 from AliExpress with the purpose of reprogramming it for XBlast purposes (RAM upgrades n such), but I found that this chip I purchased included an NPN transistor on the D0 line to properly drive it (rather than using the pin on the Lattice CPLD directly).The Jafar chip uses this same method albeit using a MOSFET of some description but the effect is the same.

    This seems like a new development, I haven't seen anyone else have a chip like this and I imagine most of the new ones produced going forwards will be this way. But it shows that the producers are taking steps to bring the modchips forward into the modern day.

    Here is a closeup of the board, you can see the added transistor.

    IMG_0276[1].JPG

  3. 2 minutes ago, Bowlsnapper said:

    interesting... What is the purpose though? Youˋre saying that this holds a BIOS thatˋs normally loaded out of the TSOP or the LPC, and uses other methods to patch the boot rom than what we all use now? Was this just the first real way to do it?

    I believe it's worked the same way as it always has: With the D0 pin of the TSOP chip connected to ground (or the TSOP removed entirely), the console will attempt to boot from a bios via the LPC header. Andrew Huang's write-up of hacking the Xbox goes into better detail than I ever could.

    It's always been a case of "tell the console to boot from the LPC header, provide it with code from a ROM chip of some kind", this is just an example of the very early, very crude way that it was done (and still totally could be).

  4. 2 minutes ago, Bowlsnapper said:

    Wait, Iˋm confused. Does this chip contain a bios or an EEPROM? ...and why does it look like an Intel 8086? Itˋs fuckinˋ long and huge.

    Dude is that SST a couple posts up mounted and wired directly to the LPC port?

    It's a UV erasable rom chip (an EPROM) containing a custom bios. To call it an EEPROM would be wrong in both its function and its contents.

    And it looks like that because those things came in large DIP packages just like the 8086 did.

  5. 1 hour ago, The InSoMnIc UK said:

    Thanks for your input to date much appreciated. Ok that’s a step closer and two back! So what if I remove/desolder could I then go straight to a soft mod from Rocky5? Forgetting the Aladdin as it’s straight from AliExpress. 

    That's absolutely an option you can take in the meantime. A softmod will do just about everything you need to. I'd prefer it over keeping the current chip installed.

  6. Separating the boot animation into a separate .xbe file was a great idea, both for providing extra space for cerbios code and also for customisation. Hopefully we'll begin to see more custom anims in the future.

    Also thankfully, not including a bootanim at all skips it entirely. I was hoping that would be the case, and it is.

    • Like 1
  7. 4 hours ago, Acidmank said:

    Lol, that's rather OTT don't you think.?  There are so many bottlenecks inside the xbox that if you cant wait an extra second or 2 then perhaps you're on the wrong platform.  

    Speed comes second to the fact that the StarTech adapters I've used all boot up every single time, while the three or so generic adapters make it like a coin toss.

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